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Revision Standard – Superseded.The Verilog hardware description language (HDL) is defined in this standard. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine-readable and human-readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementers of tools supporting the language and advanced users of the language.
Product Details
- Published:
- 04/07/2006
- ISBN(s):
- 9780738148519
- Number of Pages:
- 590
- File Size:
- 1 file , 5.9 MB
- Product Code(s):
- STDSU95395